The present invention relates to a bipolar transistor and its manufacturing method, and particularly relates to a bipolar transistor using single crystal silicon germanium as an intrinsic base layer and its manufacturing method.
A bipolar transistor using conventional type single crystal silicon germanium as an intrinsic base layer is disclosed in Japanese published unexamined patent application No. Hei 7-106341, for example. FIG. 15 shows the sectional structure of the conventional type bipolar transistor.
As shown in FIG. 15, a reference number 101 denotes a silicon substrate, and, after a high concentration n-type buried layer 102 is formed in a part of the silicon substrate 101 and a low concentration n-type silicon layer 103 which will be a collector layer is epitaxially grown on the overall surface of the silicon substrate 101, a device isolation layer 104 is selectively formed. A high concentration n-type area 105 is formed in a part which will be a collector by implanting n-type dopant ions. After three layers of a collector-base isolation layer 106, extrinsic base polysilicon 107 and an emitter-base isolation layer 109 are deposited, an emitter opening is formed, and a second emitter isolation layer 110 is formed on the respective side walls of the emitter-base isolation layer 109 and the extrinsic base polysilicon 107.
Next, an overhang of the extrinsic base polysilicon 107 is formed by selectively etching the collector-base isolation layer 106. Then, at the same time that a low concentration p-type single crystal silicon layer 111 is formed on the surface of the low concentration n-type silicon layer 103, a low concentration p-type polysilicon layer 112 is selectively formed on the bottom of the overhang of the extrinsic base electrode. In this case, p-type dopant is diffused into the polysilicon 112 from the extrinsic base polysilicon 107 by applying heat treatment at 900xc2x0 C. for five minutes, for example, to be a high concentration p-type. An intrinsic base 113 composed of a p-type single crystal silicon germanium layer is formed on the low concentration p-type single crystal silicon layer 111 by selective growth, again and a link base 114 composed of a p-type polycrystalline silicon germanium layer is simultaneously formed on the high concentration p-type polysilicon layer by selective growth again. Hereby, the intrinsic base 113 and the extrinsic base electrode 107 are connected via the link bases 112 and 114 in a self-aligned manner.
Next, an n-type single crystal silicon layer 116 is formed by implanting n-type dopant ions only into the opening using the emitter-base isolation layer 110 as a mask so that an intrinsic area of the transistor is included. After a third emitter-base isolation layer 115 is formed on the side wall of the opening, an n-type single crystal silicon layer 117 which will be an emitter is epitaxially grown, and a base electrode 118, an emitter electrode 119, and a collector electrode 120 are formed.
In the bipolar transistor using the conventional type single crystal silicon germanium for the intrinsic base layer, to enhance the concentration of the polysilicon layer 112 formed under the overhang of the extrinsic base electrode, it is necessary to apply annealing and diffuse dopant from the extrinsic base polysilicon 107. Because of the annealing, n-type dopant included in the high concentration n-type buried layer 102 is diffused and the profile of impurities in the intrinsic part of the transistor varies.
Also, as contaminations such as oxygen and carbon adhere to the surface of the single crystal silicon layer 111 for annealing during epitaxial growth, a stacking fault occurs in restarted epitaxial growth.
Further, there is a problem that as the surface morphology of the single crystal silicon layer 111 is deteriorated by an oxidation-reduction reaction during annealing, a recombination center is formed on a boundary between the intrinsic base 113 and the collector layer 111, leakage current is caused in the collector-base junction of the transistor, and the breakdown voltage is deteriorated.
Also, time for heating and cooling time between the temperature of epitaxial growth and that of annealing is required in addition to time for annealing, and the throughput of wafer processing is deteriorated.
Further, there is a problem that as an energy barrier is formed on an interface between the single crystal silicon layer 111 which will be a collector layer and the intrinsic base 113 in case the single crystal silicon germanium layer is epitaxially grown as the intrinsic base 113, electrons injected from an emitter are inhibited by the energy barrier, base transit time is increased, and the operation of the transistor is slowed.
Therefore, the object of the invention is to provide a bipolar transistor wherein a single crystal silicon germanium layer is used for an intrinsic base layer, and little divergence of impurities from a high concentration buried layer occurs. It is also an object to provide a bipolar transistor in which breakdown voltage is high because few crystal defects occur in a base layer and little leakage current due to morphology is caused, external base resistance for enabling high-speed circuit operation is low, no energy barrier is caused between a collector and a base and in addition, it can be manufactured with a large throughput and its manufacturing method.
A bipolar transistor according to the invention is characterized in that it is provided with at least a first conductivity type of silicon layer, for example, as shown in FIG. 1, a low concentration n-type collector layer 3 to be a first collector area, a multilayer film composed of a first insulating film, provided on the surface of the first conductivity type of silicon layer, that is, a collector-base isolation layer 7, a second conductivity type of polycrystal layer of a reverse conductivity type to the first conductivity type, that is, a base leading-out electrode 9 made of p-type polysilicon and a second insulating film, that is, an emitter-base isolation layer 10, and an opening provided to the multilayer film. The bipolar transistor also includes a first single crystal silicon germanium layer of the second conductivity type provided in the opening, that is, a single crystal layer 13 made of single crystal silicon germanium, a second single crystal silicon germanium layer of the second conductivity type provided on the first single crystal silicon germanium layer of the second conductivity type, that is, a p-type intrinsic base layer 14 made of single crystal silicon germanium, a second conductivity type of polycrystalline silicon germanium layer provided so that the layer is in contact with both the second single crystal silicon germanium layer of the second conductivity type and the second conductivity type of polycrystal layer, that is, a p-type link base layer 15 made of polycrystalline silicon germanium. The bipolar transistor also includes a first single crystal area of the first conductivity type provided on the second single crystal silicon germanium layer of the second conductivity type, that is, a high concentration emitter area 20 composed of a single crystal layer and a second single crystal area of the first conductivity type formed including a part of the first single crystal silicon germanium layer of the second conductive type, that is, a selectively ion implanted collector area 18 which is the second single crystal area of the first conductivity type higher in concentration than the first single crystal silicon germanium layer of the second conductivity type and lower in the concentration than the first single crystal area of the first conductivity type.
In the bipolar transistor, the first single crystal area of the first conductivity type may be composed of a single crystal silicon layer or a single crystal silicon germanium layer.
Also, in the bipolar transistor, the second conductivity type of polycrystal layer may be composed of a polysilicon layer or a polycrystalline silicon germanium layer.
It is preferable that a second conductivity type of single crystal layer is provided on the second silicon germanium layer of the second conductivity type and which is lower in its concentration of impurities than the second silicon germanium layer of the second conductivity type. That is, as shown in FIG. 8, it is favorable that a low concentration cap layer 25 made of a single crystal is provided in structure where the intrinsic base area 14 and the base leading-out electrode 9 are bonded by the link base 15.
In this case, the second conductivity type of single crystal layer, that is, the cap layer 25, may be composed of a single crystal silicon layer or a single crystal silicon germanium layer.
It is preferable that in any bipolar transistor described above, in the first insulating film, shown in FIG. 1, in the first collector-base isolation layer 7 is composed of a silicon oxide film.
Also, it is preferable that in any bipolar transistor described above, in the second insulating film, shown in FIG. 1, the emitter-base isolation layer 10 is composed of a silicon oxide film.
It is preferred that in any bipolar transistor described above, a third insulating film, that is, a second collector-base isolation layer 8, is provided between the first insulating film and the second conductivity type of polycrystal layer, that is, between the first collector-base isolation layer 7 and the base leading-out layer 9 in FIG. 1.
It is also preferred that, in any bipolar transistor described above, in the third insulating film, shown in FIG. 1, the second collector-base isolation layer 8 is composed of a silicon nitride film.
Also, it is preferable that, in the bipolar transistor described above, the upper surface of the second single crystal silicon germanium layer of the second conductivity type is above the lower surface of the end of the second conductivity type of the polycrystal layer on the side close to the second single crystal silicon germanium layer of the second conductivity type, so that the upper surface of the second conductivity type of polycrystalline silicon germanium layer and the upper surface of the first single crystal area of the first conductivity type are substantially at an equal level, as shown in FIG. 11. Also, the upper surface of the intrinsic base 14 is above the lower surface of an overhang of the base leading-out electrode 9 and the upper surface of the link base 15 and the upper surface of the emitter layer 20 are substantially at an equal level.
Also, the manufacturing method of the bipolar transistor according to the invention is characterized in that the bipolar transistor is provided with a first conductivity type of silicon layer, a multilayer film composed of a first insulating film provided on the surface of the first conductivity type of silicon layer, a second conductivity type of polycrystal layer of opposite conductivity type to the first conductivity type and a second insulating film, an opening provided to the multilayer film, and a first single crystal silicon germanium layer of the second conductivity type provided in the opening. The bipolar transistor also includes a second single crystal silicon germanium layer of the second conductivity type provided on the first single crystal silicon germanium layer of the second conductivity type, a second conductivity type of polycrystalline silicon germanium layer provided so that the layer is in contact with both the second single crystal silicon germanium layer of the second conductivity type and the second conductivity type of polycrystal layer, a first single crystal area of the first conductivity type provided on the second single crystal silicon germanium layer of the second conductivity type, and a second single crystal area of the first conductivity type formed including a part of the first single crystal silicon germanium layers of the second conductivity type. A process for forming the first and second single crystal silicon germanium layer of the second conductivity type and the second conductivity type of polycrystalline silicon germanium layer is a process depending upon epitaxial growth and it is favorable that the epitaxial growth is performed under the temperature condition of 500 to 700xc2x0 C. In this case, it is also preferable that pressure in growth does not exceed 100 Pa.
The objects of the invention described above and other objects will be clarified by the following detailed description and attached claims, which refer to the attached drawings. In the attached drawings, the same reference numbers denote the same or similar parts.